In digital signal processors (DSPs) and other circuits, a sum and a difference may need to be calculated for a pair of operands for subsequent processing. For example, the sum and the difference may be used in Fast Fourier Transform (FFT) operations and Discrete Cosine Transform (DCT) butterfly operations. Conventionally, the sum and difference may be calculated serially, which limits throughput, or in parallel using two independent floating-point adders, which is expensive in terms of silicon area and power consumption. Hence, there is a need for improved add and subtract circuitry.